x86inc: Support memory operands in src1 in 3-operand instructions
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All threads resolved!
Particularly in code that makes heavy use of macros it's possible to end up with 3-operand instructions with a memory operand in src1. In the case of SSE this works fine due to automatic move insertions, but in AVX that fails since memory operands are only allowed in src2.
The main purpose of this feature is to minimize the amount of code changes required to facilitate conversion of existing SSE code to AVX.
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- Resolved by Henrik Gramner
- Resolved by Henrik Gramner
added 1 commit
- e73fc230 - x86inc: Support memory operands in src1 in 3-operand instructions
added 1 commit
- 8b2721d2 - x86inc: Add an option for forcing VEX-encoding in non-AVX functions
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