Support for armv7 in the querying/enabling tool, support for armv6/ARM1176JZS, set PMCR.E in the arm64 module

For the armv6 cycle counters, afaik it's not universally available on all armv6 cores (and not necessarily with the same coprocessor numbers either?), but this tries accessing it like it's done for ARM1176JZS (the one on raspberry pi 1).

My local code for doing the same is mostly similar, with the following differences:

• My code just bluntly overwrites PMCNTENSET_EL0 and PMCR_EL0 instead of orring in the desired bits
• My code for armv7 disabled overflow interrupts and cleared the overflow count, and set a few more bits in PMCR (the P and C bits, resetting the counter to zero), but that's probably not necessary (and if that's desired, we should do the same for arm64 as well, for consistency)

I was a bit surprised to see that your code left PMCR.E untouched by the module, keeping the timers stopped after the module was loaded. I added a commit for that, but the inline assembly looks a bit more messy after that. After that, the module's enable_ccnt_read would essentially be just updating PMUSERENR_EL0 and then the same as enable_pmccntr (which is very nicely formatted) from arm64-perfcounters.c.