1. 11 Mar, 2019 2 commits
  2. 09 Mar, 2019 2 commits
  3. 08 Mar, 2019 2 commits
    • Janne Grunau's avatar
      let dav1d_version() return the project version · 754487c0
      Janne Grunau authored
      Increments the soname revision number for this behavior change.
      Removes the DAV1D_VERSION and DAV1D_VERSION_INT defines and
      dav1d_version_vcs() and dav1d_version_int().
      Also cleans up the version usage in dav1d CLI.
      Refs #241, #255.
      754487c0
    • Victorien Le Couviour--Tuffet's avatar
      x86: add SSSE3 cdef dir implementation · d67e3476
      Victorien Le Couviour--Tuffet authored
      ```------------------
      x86_64:
      ```
      
      ---------------------------------------
      cdef_dir_8bpc_c: 1023.1
      cdef_dir_8bpc_ssse3: 110.3
      cdef_dir_8bpc_avx2: 71.1
      ------------------------------------------
      
      ---------------------
      x86_32:
      ------------------------------------------
      cdef_dir_8bpc_c: 1074.8
      cdef_dir_8bpc_ssse3: 120.6
      ------------------------------------------
      
      Thanks to Ronald for the AVX2 XMM version which was a very good starting
      point.
      d67e3476
  4. 06 Mar, 2019 3 commits
  5. 05 Mar, 2019 4 commits
    • Martin Storsjö's avatar
      arm64: cdef: Clarify a slightly confusing comment · 86ce4a3c
      Martin Storsjö authored
      This might have said pri_taps[k]/sec_taps[k] at some earlier time.
      86ce4a3c
    • Martin Storsjö's avatar
      arm64: cdef: Use a smarter padding constant · 8f8dc928
      Martin Storsjö authored
      Pad with a value which works both as a large unsigned value and a
      negative signed value. This allows doing the max operation using
      signed max, avoiding the conditional altogether.
      
      Based on the same idea for x86 by Kyle Siefring.
      
      Before:                  Cortex A53     A72     A73
      cdef_filter_4x4_8bpc_neon:    645.5   401.9   422.5
      cdef_filter_4x8_8bpc_neon:   1193.7   756.6   782.4
      cdef_filter_8x8_8bpc_neon:   2162.4  1361.9  1375.6
      After:
      cdef_filter_4x4_8bpc_neon:    596.3   377.8   384.8
      cdef_filter_4x8_8bpc_neon:   1097.4   705.5   707.1
      cdef_filter_8x8_8bpc_neon:   1967.4  1232.3  1239.9
      8f8dc928
    • Martin Storsjö's avatar
      arm64: cdef: Do saturating subtractions to avoid max operations with 0 · 4f5261a0
      Martin Storsjö authored
      Before:                  Cortex A53     A72     A73
      cdef_filter_4x4_8bpc_neon:    677.4   433.9   452.9
      cdef_filter_4x8_8bpc_neon:   1255.0   815.2   841.8
      cdef_filter_8x8_8bpc_neon:   2278.5  1440.0  1505.0
      After:
      cdef_filter_4x4_8bpc_neon:    645.5   401.9   422.5
      cdef_filter_4x8_8bpc_neon:   1193.7   756.6   782.4
      cdef_filter_8x8_8bpc_neon:   2162.4  1361.9  1375.6
      4f5261a0
    • Kyle Siefring's avatar
      Utilize a better CDEF constant for avx2 · dc2ae517
      Kyle Siefring authored
      Before:
      ```
      cdef_filter_8x8_8bpc_avx2: 275.5
      cdef_filter_4x8_8bpc_avx2: 193.3
      cdef_filter_4x4_8bpc_avx2: 113.5
      ```
      After:
      ```
      cdef_filter_8x8_8bpc_avx2: 252.3
      cdef_filter_4x8_8bpc_avx2: 182.1
      cdef_filter_4x4_8bpc_avx2: 105.7
      ```
      dc2ae517
  6. 04 Mar, 2019 3 commits
    • Jean-Baptiste Kempf's avatar
      On the road to 0.2.1 · e29cb9af
      Jean-Baptiste Kempf authored
      e29cb9af
    • Kyle Siefring's avatar
      Remove unused data from x86/cdef.asm · 8e379f1d
      Kyle Siefring authored
      8e379f1d
    • François Cartegnie's avatar
      x86: add SSSE3 mc prep_8tap implementation · 0afec6b1
      François Cartegnie authored
      ```------------------
      x86_64:
      ```
      
      ---------------------------------------
      mct_8tap_regular_w4_0_8bpc_c: 115.6
      mct_8tap_regular_w4_0_8bpc_ssse3: 13.1
      mct_8tap_regular_w4_0_8bpc_avx2: 13.3
      ------------------------------------------
      mct_8tap_regular_w4_h_8bpc_c: 363.0
      mct_8tap_regular_w4_h_8bpc_ssse3: 19.1
      mct_8tap_regular_w4_h_8bpc_avx2: 16.5
      ------------------------------------------
      mct_8tap_regular_w4_hv_8bpc_c: 832.2
      mct_8tap_regular_w4_hv_8bpc_ssse3: 113.4
      mct_8tap_regular_w4_hv_8bpc_avx2: 53.1
      ------------------------------------------
      mct_8tap_regular_w4_v_8bpc_c: 488.5
      mct_8tap_regular_w4_v_8bpc_ssse3: 38.9
      mct_8tap_regular_w4_v_8bpc_avx2: 26.0
      ------------------------------------------
      mct_8tap_regular_w8_0_8bpc_c: 259.3
      mct_8tap_regular_w8_0_8bpc_ssse3: 20.4
      mct_8tap_regular_w8_0_8bpc_avx2: 18.0
      ------------------------------------------
      mct_8tap_regular_w8_h_8bpc_c: 1124.3
      mct_8tap_regular_w8_h_8bpc_ssse3: 67.7
      mct_8tap_regular_w8_h_8bpc_avx2: 43.3
      ------------------------------------------
      mct_8tap_regular_w8_hv_8bpc_c: 2155.0
      mct_8tap_regular_w8_hv_8bpc_ssse3: 340.8
      mct_8tap_regular_w8_hv_8bpc_avx2: 151.3
      ------------------------------------------
      mct_8tap_regular_w8_v_8bpc_c: 1195.4
      mct_8tap_regular_w8_v_8bpc_ssse3: 72.4
      mct_8tap_regular_w8_v_8bpc_avx2: 39.8
      ------------------------------------------
      mct_8tap_regular_w16_0_8bpc_c: 158.3
      mct_8tap_regular_w16_0_8bpc_ssse3: 52.9
      mct_8tap_regular_w16_0_8bpc_avx2: 30.2
      ------------------------------------------
      mct_8tap_regular_w16_h_8bpc_c: 4267.4
      mct_8tap_regular_w16_h_8bpc_ssse3: 211.9
      mct_8tap_regular_w16_h_8bpc_avx2: 121.4
      ------------------------------------------
      mct_8tap_regular_w16_hv_8bpc_c: 5430.9
      mct_8tap_regular_w16_hv_8bpc_ssse3: 986.8
      mct_8tap_regular_w16_hv_8bpc_avx2: 428.4
      ------------------------------------------
      mct_8tap_regular_w16_v_8bpc_c: 4604.2
      mct_8tap_regular_w16_v_8bpc_ssse3: 199.1
      mct_8tap_regular_w16_v_8bpc_avx2: 100.7
      ------------------------------------------
      mct_8tap_regular_w32_0_8bpc_c: 372.9
      mct_8tap_regular_w32_0_8bpc_ssse3: 231.9
      mct_8tap_regular_w32_0_8bpc_avx2: 99.7
      ------------------------------------------
      mct_8tap_regular_w32_h_8bpc_c: 15975.0
      mct_8tap_regular_w32_h_8bpc_ssse3: 802.9
      mct_8tap_regular_w32_h_8bpc_avx2: 468.5
      ------------------------------------------
      mct_8tap_regular_w32_hv_8bpc_c: 18555.5
      mct_8tap_regular_w32_hv_8bpc_ssse3: 3673.5
      mct_8tap_regular_w32_hv_8bpc_avx2: 1587.6
      ------------------------------------------
      mct_8tap_regular_w32_v_8bpc_c: 16632.4
      mct_8tap_regular_w32_v_8bpc_ssse3: 743.5
      mct_8tap_regular_w32_v_8bpc_avx2: 337.8
      ------------------------------------------
      mct_8tap_regular_w64_0_8bpc_c: 675.9
      mct_8tap_regular_w64_0_8bpc_ssse3: 513.6
      mct_8tap_regular_w64_0_8bpc_avx2: 285.4
      ------------------------------------------
      mct_8tap_regular_w64_h_8bpc_c: 37161.3
      mct_8tap_regular_w64_h_8bpc_ssse3: 1929.7
      mct_8tap_regular_w64_h_8bpc_avx2: 1138.1
      ------------------------------------------
      mct_8tap_regular_w64_hv_8bpc_c: 42434.0
      mct_8tap_regular_w64_hv_8bpc_ssse3: 8822.1
      mct_8tap_regular_w64_hv_8bpc_avx2: 3853.5
      ------------------------------------------
      mct_8tap_regular_w64_v_8bpc_c: 37969.1
      mct_8tap_regular_w64_v_8bpc_ssse3: 1805.6
      mct_8tap_regular_w64_v_8bpc_avx2: 826.1
      ------------------------------------------
      mct_8tap_regular_w128_0_8bpc_c: 1532.7
      mct_8tap_regular_w128_0_8bpc_ssse3: 1397.7
      mct_8tap_regular_w128_0_8bpc_avx2: 813.8
      ------------------------------------------
      mct_8tap_regular_w128_h_8bpc_c: 91204.3
      mct_8tap_regular_w128_h_8bpc_ssse3: 4783.0
      mct_8tap_regular_w128_h_8bpc_avx2: 2767.2
      ------------------------------------------
      mct_8tap_regular_w128_hv_8bpc_c: 102396.0
      mct_8tap_regular_w128_hv_8bpc_ssse3: 22202.3
      mct_8tap_regular_w128_hv_8bpc_avx2: 9637.2
      ------------------------------------------
      mct_8tap_regular_w128_v_8bpc_c: 92294.3
      mct_8tap_regular_w128_v_8bpc_ssse3: 4952.8
      mct_8tap_regular_w128_v_8bpc_avx2: 2370.1
      ------------------------------------------
      
      ---------------------
      x86_32:
      ------------------------------------------
      mct_8tap_regular_w4_0_8bpc_c: 131.3
      mct_8tap_regular_w4_0_8bpc_ssse3: 18.7
      ------------------------------------------
      mct_8tap_regular_w4_h_8bpc_c: 422.0
      mct_8tap_regular_w4_h_8bpc_ssse3: 27.3
      ------------------------------------------
      mct_8tap_regular_w4_hv_8bpc_c: 1012.6
      mct_8tap_regular_w4_hv_8bpc_ssse3: 123.6
      ------------------------------------------
      mct_8tap_regular_w4_v_8bpc_c: 589.6
      mct_8tap_regular_w4_v_8bpc_ssse3: 48.9
      ------------------------------------------
      mct_8tap_regular_w8_0_8bpc_c: 278.5
      mct_8tap_regular_w8_0_8bpc_ssse3: 26.3
      ------------------------------------------
      mct_8tap_regular_w8_h_8bpc_c: 1129.3
      mct_8tap_regular_w8_h_8bpc_ssse3: 80.6
      ------------------------------------------
      mct_8tap_regular_w8_hv_8bpc_c: 2556.4
      mct_8tap_regular_w8_hv_8bpc_ssse3: 354.6
      ------------------------------------------
      mct_8tap_regular_w8_v_8bpc_c: 1460.2
      mct_8tap_regular_w8_v_8bpc_ssse3: 103.8
      ------------------------------------------
      mct_8tap_regular_w16_0_8bpc_c: 218.9
      mct_8tap_regular_w16_0_8bpc_ssse3: 58.4
      ------------------------------------------
      mct_8tap_regular_w16_h_8bpc_c: 4471.8
      mct_8tap_regular_w16_h_8bpc_ssse3: 237.2
      ------------------------------------------
      mct_8tap_regular_w16_hv_8bpc_c: 5570.5
      mct_8tap_regular_w16_hv_8bpc_ssse3: 1044.1
      ------------------------------------------
      mct_8tap_regular_w16_v_8bpc_c: 4885.5
      mct_8tap_regular_w16_v_8bpc_ssse3: 268.3
      ------------------------------------------
      mct_8tap_regular_w32_0_8bpc_c: 495.6
      mct_8tap_regular_w32_0_8bpc_ssse3: 236.6
      ------------------------------------------
      mct_8tap_regular_w32_h_8bpc_c: 15903.5
      mct_8tap_regular_w32_h_8bpc_ssse3: 872.5
      ------------------------------------------
      mct_8tap_regular_w32_hv_8bpc_c: 19402.2
      mct_8tap_regular_w32_hv_8bpc_ssse3: 3832.8
      ------------------------------------------
      mct_8tap_regular_w32_v_8bpc_c: 17119.5
      mct_8tap_regular_w32_v_8bpc_ssse3: 935.2
      ------------------------------------------
      mct_8tap_regular_w64_0_8bpc_c: 877.0
      mct_8tap_regular_w64_0_8bpc_ssse3: 515.7
      ------------------------------------------
      mct_8tap_regular_w64_h_8bpc_c: 36832.1
      mct_8tap_regular_w64_h_8bpc_ssse3: 2094.1
      ------------------------------------------
      mct_8tap_regular_w64_hv_8bpc_c: 43965.3
      mct_8tap_regular_w64_hv_8bpc_ssse3: 9423.0
      ------------------------------------------
      mct_8tap_regular_w64_v_8bpc_c: 37041.2
      mct_8tap_regular_w64_v_8bpc_ssse3: 2348.9
      ------------------------------------------
      mct_8tap_regular_w128_0_8bpc_c: 1929.9
      mct_8tap_regular_w128_0_8bpc_ssse3: 1392.3
      ------------------------------------------
      mct_8tap_regular_w128_h_8bpc_c: 86022.5
      mct_8tap_regular_w128_h_8bpc_ssse3: 5110.8
      ------------------------------------------
      mct_8tap_regular_w128_hv_8bpc_c: 105793.5
      mct_8tap_regular_w128_hv_8bpc_ssse3: 23278.8
      ------------------------------------------
      mct_8tap_regular_w128_v_8bpc_c: 88223.5
      mct_8tap_regular_w128_v_8bpc_ssse3: 7442.7
      ------------------------------------------
      0afec6b1
  7. 03 Mar, 2019 1 commit
  8. 02 Mar, 2019 1 commit
  9. 01 Mar, 2019 10 commits
    • Henrik Gramner's avatar
      x86: Check for BMI1 and BMI2 flags in addition to AVX2 · 493155af
      Henrik Gramner authored
      All known AVX2-capable CPU:s has BMI1 and BMI2, but apparently some
      x86 emulators can be configured to emulate esoteric combinations of
      instruction sets that doesn't correspond to any existing hardware.
      493155af
    • James Almer's avatar
      picture: fix default_picture_allocator() return value on failure · d7c3420b
      James Almer authored
      The doxy for Dav1dPicAllocator.alloc_picture_callback() states it must be a
      negative errno value.
      Propagate it as well in picture_alloc_with_edges().
      d7c3420b
    • James Almer's avatar
    • Jean-Baptiste Kempf's avatar
      Update NEWS for 0.2.0 · 0e55d462
      Jean-Baptiste Kempf authored
      0e55d462
    • Jean-Baptiste Kempf's avatar
      Update copyright years · 5c9bd45e
      Jean-Baptiste Kempf authored
      5c9bd45e
    • Matthias Dressel's avatar
      ci: Add style check for 'david' with an i · b78fba8f
      Matthias Dressel authored
      Check the code for misspellings of 'dav1d'/'DAV1D' as 'david'/'DAVID'.
      This helps consistency and prevents bugs arising from these
      misspellings.
      b78fba8f
    • Matthias Dressel's avatar
      tools/dav1d: Fix help text · e1c5fed0
      Matthias Dressel authored
      Add an argument placeholder for the filmgrain option.
      e1c5fed0
    • Liwei Wang's avatar
      Add SSSE3 implementation for the 16x16 blocks in itx · 1b30cf2a
      Liwei Wang authored
      Cycle times:
      inv_txfm_add_16x16_adst_adst_0_8bpc_c: 19643.8
      inv_txfm_add_16x16_adst_adst_0_8bpc_ssse3: 870.0
      inv_txfm_add_16x16_adst_adst_1_8bpc_c: 19611.7
      inv_txfm_add_16x16_adst_adst_1_8bpc_ssse3: 870.3
      inv_txfm_add_16x16_adst_adst_2_8bpc_c: 19554.2
      inv_txfm_add_16x16_adst_adst_2_8bpc_ssse3: 869.9
      inv_txfm_add_16x16_adst_dct_0_8bpc_c: 19499.2
      inv_txfm_add_16x16_adst_dct_0_8bpc_ssse3: 761.1
      inv_txfm_add_16x16_adst_dct_1_8bpc_c: 19819.1
      inv_txfm_add_16x16_adst_dct_1_8bpc_ssse3: 760.9
      inv_txfm_add_16x16_adst_dct_2_8bpc_c: 19684.5
      inv_txfm_add_16x16_adst_dct_2_8bpc_ssse3: 761.4
      inv_txfm_add_16x16_adst_flipadst_0_8bpc_c: 19309.3
      inv_txfm_add_16x16_adst_flipadst_0_8bpc_ssse3: 877.2
      inv_txfm_add_16x16_adst_flipadst_1_8bpc_c: 19374.3
      inv_txfm_add_16x16_adst_flipadst_1_8bpc_ssse3: 876.8
      inv_txfm_add_16x16_adst_flipadst_2_8bpc_c: 19548.6
      inv_txfm_add_16x16_adst_flipadst_2_8bpc_ssse3: 879.4
      inv_txfm_add_16x16_dct_adst_0_8bpc_c: 19715.3
      inv_txfm_add_16x16_dct_adst_0_8bpc_ssse3: 757.6
      inv_txfm_add_16x16_dct_adst_1_8bpc_c: 19586.6
      inv_txfm_add_16x16_dct_adst_1_8bpc_ssse3: 756.8
      inv_txfm_add_16x16_dct_adst_2_8bpc_c: 19447.3
      inv_txfm_add_16x16_dct_adst_2_8bpc_ssse3: 757.2
      inv_txfm_add_16x16_dct_dct_0_8bpc_c: 19188.0
      inv_txfm_add_16x16_dct_dct_0_8bpc_ssse3: 64.3
      inv_txfm_add_16x16_dct_dct_1_8bpc_c: 19230.1
      inv_txfm_add_16x16_dct_dct_1_8bpc_ssse3: 649.1
      inv_txfm_add_16x16_dct_dct_2_8bpc_c: 19276.7
      inv_txfm_add_16x16_dct_dct_2_8bpc_ssse3: 649.5
      inv_txfm_add_16x16_dct_flipadst_0_8bpc_c: 19967.8
      inv_txfm_add_16x16_dct_flipadst_0_8bpc_ssse3: 761.1
      inv_txfm_add_16x16_dct_flipadst_1_8bpc_c: 19665.7
      inv_txfm_add_16x16_dct_flipadst_1_8bpc_ssse3: 761.0
      inv_txfm_add_16x16_dct_flipadst_2_8bpc_c: 19766.2
      inv_txfm_add_16x16_dct_flipadst_2_8bpc_ssse3: 760.6
      inv_txfm_add_16x16_dct_identity_0_8bpc_c: 13874.5
      inv_txfm_add_16x16_dct_identity_0_8bpc_ssse3: 97.3
      inv_txfm_add_16x16_dct_identity_1_8bpc_c: 13931.8
      inv_txfm_add_16x16_dct_identity_1_8bpc_ssse3: 76.3
      inv_txfm_add_16x16_dct_identity_2_8bpc_c: 13801.5
      inv_txfm_add_16x16_dct_identity_2_8bpc_ssse3: 454.6
      inv_txfm_add_16x16_flipadst_adst_0_8bpc_c: 18900.6
      inv_txfm_add_16x16_flipadst_adst_0_8bpc_ssse3: 884.6
      inv_txfm_add_16x16_flipadst_adst_1_8bpc_c: 19180.2
      inv_txfm_add_16x16_flipadst_adst_1_8bpc_ssse3: 886.7
      inv_txfm_add_16x16_flipadst_adst_2_8bpc_c: 19320.8
      inv_txfm_add_16x16_flipadst_adst_2_8bpc_ssse3: 884.6
      inv_txfm_add_16x16_flipadst_dct_0_8bpc_c: 19399.7
      inv_txfm_add_16x16_flipadst_dct_0_8bpc_ssse3: 775.0
      inv_txfm_add_16x16_flipadst_dct_1_8bpc_c: 19345.0
      inv_txfm_add_16x16_flipadst_dct_1_8bpc_ssse3: 774.6
      inv_txfm_add_16x16_flipadst_dct_2_8bpc_c: 19426.2
      inv_txfm_add_16x16_flipadst_dct_2_8bpc_ssse3: 775.6
      inv_txfm_add_16x16_flipadst_flipadst_0_8bpc_c: 19457.6
      inv_txfm_add_16x16_flipadst_flipadst_0_8bpc_ssse3: 887.8
      inv_txfm_add_16x16_flipadst_flipadst_1_8bpc_c: 19413.8
      inv_txfm_add_16x16_flipadst_flipadst_1_8bpc_ssse3: 885.3
      inv_txfm_add_16x16_flipadst_flipadst_2_8bpc_c: 19425.6
      inv_txfm_add_16x16_flipadst_flipadst_2_8bpc_ssse3: 886.3
      inv_txfm_add_16x16_identity_dct_0_8bpc_c: 14150.7
      inv_txfm_add_16x16_identity_dct_0_8bpc_ssse3: 104.3
      inv_txfm_add_16x16_identity_dct_1_8bpc_c: 14041.5
      inv_txfm_add_16x16_identity_dct_1_8bpc_ssse3: 104.2
      inv_txfm_add_16x16_identity_dct_2_8bpc_c: 13917.7
      inv_txfm_add_16x16_identity_dct_2_8bpc_ssse3: 459.7
      inv_txfm_add_16x16_identity_identity_0_8bpc_c: 8761.7
      inv_txfm_add_16x16_identity_identity_0_8bpc_ssse3: 263.3
      inv_txfm_add_16x16_identity_identity_1_8bpc_c: 8669.5
      inv_txfm_add_16x16_identity_identity_1_8bpc_ssse3: 263.4
      inv_txfm_add_16x16_identity_identity_2_8bpc_c: 8282.1
      inv_txfm_add_16x16_identity_identity_2_8bpc_ssse3: 263.3
      1b30cf2a
    • Ronald S. Bultje's avatar
      255581d5
    • Matthias Dressel's avatar
      Update the copyright year to 2019 · f1cdb441
      Matthias Dressel authored
      f1cdb441
  10. 26 Feb, 2019 12 commits
    • Janne Grunau's avatar
      obu: ignore operating_parameter_info in new sequence check · 2abc436e
      Janne Grunau authored
      The operating_parameter_info is allowed to change in a single sequence.
      Reorder Dav1dSequenceHeader so the check for new sequence can still be
      done with memcmp and pffsetof.
      2abc436e
    • Victorien Le Couviour--Tuffet's avatar
      x86: add SSSE3 cdef filters implementation · 791ec219
      Victorien Le Couviour--Tuffet authored
      AVX2 adaption
      
      ---------------------
      x86_64:
      ------------------------------------------
      cdef_filter_4x4_8bpc_c: 1370.2
      cdef_filter_4x4_8bpc_ssse3: 142.3
      cdef_filter_4x4_8bpc_avx2: 106.7
      ------------------------------------------
      cdef_filter_4x8_8bpc_c: 2749.3
      cdef_filter_4x8_8bpc_ssse3: 257.2
      cdef_filter_4x8_8bpc_avx2: 178.8
      ------------------------------------------
      cdef_filter_8x8_8bpc_c: 5609.5
      cdef_filter_8x8_8bpc_ssse3: 438.1
      cdef_filter_8x8_8bpc_avx2: 250.6
      ------------------------------------------
      
      ---------------------
      x86_32:
      ------------------------------------------
      cdef_filter_4x4_8bpc_c: 1548.7
      cdef_filter_4x4_8bpc_ssse3: 179.8
      ------------------------------------------
      cdef_filter_4x8_8bpc_c: 3128.2
      cdef_filter_4x8_8bpc_ssse3: 328.1
      ------------------------------------------
      cdef_filter_8x8_8bpc_c: 6454.5
      cdef_filter_8x8_8bpc_ssse3: 584.4
      ------------------------------------------
      791ec219
    • Victorien Le Couviour--Tuffet's avatar
      x86: optimize AVX2 cdef filters · 80650d4c
      Victorien Le Couviour--Tuffet authored
      before: cdef_filter_4x4_8bpc_avx2: 110.4
       after: cdef_filter_4x4_8bpc_avx2: 106.0
      
      before: cdef_filter_4x8_8bpc_avx2: 188.3
       after: cdef_filter_4x8_8bpc_avx2: 182.2
      
      before: cdef_filter_8x8_8bpc_avx2: 276.7
       after: cdef_filter_8x8_8bpc_avx2: 252.5
      
      Credit to Gramner.
      80650d4c
    • Victorien Le Couviour--Tuffet's avatar
    • Victorien Le Couviour--Tuffet's avatar
      x86: add AVX2 cdef_filter_4x8 · 19b4c9c0
      Victorien Le Couviour--Tuffet authored
      used for YUV 422 chroma blocks
      
      cdef_filter_4x8_8bpc_c: 2711.6
      cdef_filter_4x8_8bpc_avx2: 189.1
      19b4c9c0
    • Victorien Le Couviour--Tuffet's avatar
    • Victorien Le Couviour--Tuffet's avatar
      x86: improve AVX2 cdef_filter macro consistency · 3db19426
      Victorien Le Couviour--Tuffet authored
      - consistently use %3 instead of hardcoded value for tmp stride
      - also correct a comment
      3db19426
    • Victorien Le Couviour--Tuffet's avatar
      checkasm: decrease cdef filter min damping value · ded8ed3f
      Victorien Le Couviour--Tuffet authored
      The chroma damping being set to luma damping - 1, we need to decrease
      the minimum damping value to ensure a proper clipping test for
      clip(0, d - log2(s)).
      ded8ed3f
    • Janne Grunau's avatar
      fix dav1d spelling · ada9231c
      Janne Grunau authored
      ada9231c
    • Konstantin Pavlov's avatar
      CI: Allow snap build/publish to fail · 9cc1c7b3
      Konstantin Pavlov authored
      9cc1c7b3
    • Konstantin Pavlov's avatar
      f6029b01
    • Liwei Wang's avatar
      Add SSSE3 implementation for the 8x16 and 16x8 blocks in itx · a532e5ae
      Liwei Wang authored
      Cycle times:
      inv_txfm_add_8x16_adst_adst_0_8bpc_c: 5063.0
      inv_txfm_add_8x16_adst_adst_0_8bpc_ssse3: 406.8
      inv_txfm_add_8x16_adst_adst_1_8bpc_c: 5051.2
      inv_txfm_add_8x16_adst_adst_1_8bpc_ssse3: 407.3
      inv_txfm_add_8x16_adst_adst_2_8bpc_c: 5065.4
      inv_txfm_add_8x16_adst_adst_2_8bpc_ssse3: 407.9
      inv_txfm_add_8x16_adst_dct_0_8bpc_c: 5201.1
      inv_txfm_add_8x16_adst_dct_0_8bpc_ssse3: 354.8
      inv_txfm_add_8x16_adst_dct_1_8bpc_c: 5214.8
      inv_txfm_add_8x16_adst_dct_1_8bpc_ssse3: 354.8
      inv_txfm_add_8x16_adst_dct_2_8bpc_c: 5225.0
      inv_txfm_add_8x16_adst_dct_2_8bpc_ssse3: 355.1
      inv_txfm_add_8x16_adst_flipadst_0_8bpc_c: 7135.9
      inv_txfm_add_8x16_adst_flipadst_0_8bpc_ssse3: 409.7
      inv_txfm_add_8x16_adst_flipadst_1_8bpc_c: 8354.4
      inv_txfm_add_8x16_adst_flipadst_1_8bpc_ssse3: 409.2
      inv_txfm_add_8x16_adst_flipadst_2_8bpc_c: 7198.7
      inv_txfm_add_8x16_adst_flipadst_2_8bpc_ssse3: 409.7
      inv_txfm_add_8x16_adst_identity_0_8bpc_c: 3936.5
      inv_txfm_add_8x16_adst_identity_0_8bpc_ssse3: 262.0
      inv_txfm_add_8x16_adst_identity_1_8bpc_c: 4617.8
      inv_txfm_add_8x16_adst_identity_1_8bpc_ssse3: 261.4
      inv_txfm_add_8x16_adst_identity_2_8bpc_c: 3895.1
      inv_txfm_add_8x16_adst_identity_2_8bpc_ssse3: 262.1
      inv_txfm_add_8x16_dct_adst_0_8bpc_c: 5203.9
      inv_txfm_add_8x16_dct_adst_0_8bpc_ssse3: 355.1
      inv_txfm_add_8x16_dct_adst_1_8bpc_c: 5200.8
      inv_txfm_add_8x16_dct_adst_1_8bpc_ssse3: 355.4
      inv_txfm_add_8x16_dct_adst_2_8bpc_c: 5208.2
      inv_txfm_add_8x16_dct_adst_2_8bpc_ssse3: 355.1
      inv_txfm_add_8x16_dct_dct_0_8bpc_c: 5270.8
      inv_txfm_add_8x16_dct_dct_0_8bpc_ssse3: 57.0
      inv_txfm_add_8x16_dct_dct_1_8bpc_c: 5280.9
      inv_txfm_add_8x16_dct_dct_1_8bpc_ssse3: 303.2
      inv_txfm_add_8x16_dct_dct_2_8bpc_c: 5275.9
      inv_txfm_add_8x16_dct_dct_2_8bpc_ssse3: 302.4
      inv_txfm_add_8x16_dct_flipadst_0_8bpc_c: 5374.4
      inv_txfm_add_8x16_dct_flipadst_0_8bpc_ssse3: 356.5
      inv_txfm_add_8x16_dct_flipadst_1_8bpc_c: 5449.9
      inv_txfm_add_8x16_dct_flipadst_1_8bpc_ssse3: 356.8
      inv_txfm_add_8x16_dct_flipadst_2_8bpc_c: 5446.9
      inv_txfm_add_8x16_dct_flipadst_2_8bpc_ssse3: 356.7
      inv_txfm_add_8x16_dct_identity_0_8bpc_c: 3883.4
      inv_txfm_add_8x16_dct_identity_0_8bpc_ssse3: 76.1
      inv_txfm_add_8x16_dct_identity_1_8bpc_c: 3892.3
      inv_txfm_add_8x16_dct_identity_1_8bpc_ssse3: 76.1
      inv_txfm_add_8x16_dct_identity_2_8bpc_c: 4027.1
      inv_txfm_add_8x16_dct_identity_2_8bpc_ssse3: 209.9
      inv_txfm_add_8x16_flipadst_adst_0_8bpc_c: 7387.5
      inv_txfm_add_8x16_flipadst_adst_0_8bpc_ssse3: 408.9
      inv_txfm_add_8x16_flipadst_adst_1_8bpc_c: 7298.8
      inv_txfm_add_8x16_flipadst_adst_1_8bpc_ssse3: 408.8
      inv_txfm_add_8x16_flipadst_adst_2_8bpc_c: 7397.2
      inv_txfm_add_8x16_flipadst_adst_2_8bpc_ssse3: 408.9
      inv_txfm_add_8x16_flipadst_dct_0_8bpc_c: 5250.4
      inv_txfm_add_8x16_flipadst_dct_0_8bpc_ssse3: 355.3
      inv_txfm_add_8x16_flipadst_dct_1_8bpc_c: 5263.9
      inv_txfm_add_8x16_flipadst_dct_1_8bpc_ssse3: 355.4
      inv_txfm_add_8x16_flipadst_dct_2_8bpc_c: 5259.0
      inv_txfm_add_8x16_flipadst_dct_2_8bpc_ssse3: 356.3
      inv_txfm_add_8x16_flipadst_flipadst_0_8bpc_c: 5448.4
      inv_txfm_add_8x16_flipadst_flipadst_0_8bpc_ssse3: 410.2
      inv_txfm_add_8x16_flipadst_flipadst_1_8bpc_c: 5402.6
      inv_txfm_add_8x16_flipadst_flipadst_1_8bpc_ssse3: 410.8
      inv_txfm_add_8x16_flipadst_flipadst_2_8bpc_c: 6479.7
      inv_txfm_add_8x16_flipadst_flipadst_2_8bpc_ssse3: 409.8
      inv_txfm_add_8x16_flipadst_identity_0_8bpc_c: 3828.9
      inv_txfm_add_8x16_flipadst_identity_0_8bpc_ssse3: 262.7
      inv_txfm_add_8x16_flipadst_identity_1_8bpc_c: 3884.5
      inv_txfm_add_8x16_flipadst_identity_1_8bpc_ssse3: 262.0
      inv_txfm_add_8x16_flipadst_identity_2_8bpc_c: 3809.2
      inv_txfm_add_8x16_flipadst_identity_2_8bpc_ssse3: 262.9
      inv_txfm_add_8x16_identity_adst_0_8bpc_c: 4294.5
      inv_txfm_add_8x16_identity_adst_0_8bpc_ssse3: 268.8
      inv_txfm_add_8x16_identity_adst_1_8bpc_c: 4955.4
      inv_txfm_add_8x16_identity_adst_1_8bpc_ssse3: 269.1
      inv_txfm_add_8x16_identity_adst_2_8bpc_c: 4166.4
      inv_txfm_add_8x16_identity_adst_2_8bpc_ssse3: 269.9
      inv_txfm_add_8x16_identity_dct_0_8bpc_c: 4012.3
      inv_txfm_add_8x16_identity_dct_0_8bpc_ssse3: 56.7
      inv_txfm_add_8x16_identity_dct_1_8bpc_c: 4767.1
      inv_txfm_add_8x16_identity_dct_1_8bpc_ssse3: 215.1
      inv_txfm_add_8x16_identity_dct_2_8bpc_c: 4012.6
      inv_txfm_add_8x16_identity_dct_2_8bpc_ssse3: 215.9
      inv_txfm_add_8x16_identity_flipadst_0_8bpc_c: 4452.6
      inv_txfm_add_8x16_identity_flipadst_0_8bpc_ssse3: 270.5
      inv_txfm_add_8x16_identity_flipadst_1_8bpc_c: 4885.8
      inv_txfm_add_8x16_identity_flipadst_1_8bpc_ssse3: 270.3
      inv_txfm_add_8x16_identity_flipadst_2_8bpc_c: 4186.1
      inv_txfm_add_8x16_identity_flipadst_2_8bpc_ssse3: 271.5
      inv_txfm_add_8x16_identity_identity_0_8bpc_c: 2623.0
      inv_txfm_add_8x16_identity_identity_0_8bpc_ssse3: 123.1
      inv_txfm_add_8x16_identity_identity_1_8bpc_c: 2617.7
      inv_txfm_add_8x16_identity_identity_1_8bpc_ssse3: 122.9
      inv_txfm_add_8x16_identity_identity_2_8bpc_c: 2617.2
      inv_txfm_add_8x16_identity_identity_2_8bpc_ssse3: 123.1
      inv_txfm_add_16x8_adst_adst_0_8bpc_c: 5102.3
      inv_txfm_add_16x8_adst_adst_0_8bpc_ssse3: 409.0
      inv_txfm_add_16x8_adst_adst_1_8bpc_c: 5063.2
      inv_txfm_add_16x8_adst_adst_1_8bpc_ssse3: 409.5
      inv_txfm_add_16x8_adst_adst_2_8bpc_c: 5029.1
      inv_txfm_add_16x8_adst_adst_2_8bpc_ssse3: 410.1
      inv_txfm_add_16x8_adst_dct_0_8bpc_c: 5848.8
      inv_txfm_add_16x8_adst_dct_0_8bpc_ssse3: 358.8
      inv_txfm_add_16x8_adst_dct_1_8bpc_c: 5612.8
      inv_txfm_add_16x8_adst_dct_1_8bpc_ssse3: 358.8
      inv_txfm_add_16x8_adst_dct_2_8bpc_c: 5143.2
      inv_txfm_add_16x8_adst_dct_2_8bpc_ssse3: 358.5
      inv_txfm_add_16x8_adst_flipadst_0_8bpc_c: 5072.4
      inv_txfm_add_16x8_adst_flipadst_0_8bpc_ssse3: 413.3
      inv_txfm_add_16x8_adst_flipadst_1_8bpc_c: 5082.2
      inv_txfm_add_16x8_adst_flipadst_1_8bpc_ssse3: 413.6
      inv_txfm_add_16x8_adst_flipadst_2_8bpc_c: 5108.0
      inv_txfm_add_16x8_adst_flipadst_2_8bpc_ssse3: 413.8
      inv_txfm_add_16x8_adst_identity_0_8bpc_c: 3897.2
      inv_txfm_add_16x8_adst_identity_0_8bpc_ssse3: 283.6
      inv_txfm_add_16x8_adst_identity_1_8bpc_c: 3947.2
      inv_txfm_add_16x8_adst_identity_1_8bpc_ssse3: 283.1
      inv_txfm_add_16x8_adst_identity_2_8bpc_c: 3881.7
      inv_txfm_add_16x8_adst_identity_2_8bpc_ssse3: 283.6
      inv_txfm_add_16x8_dct_adst_0_8bpc_c: 5200.7
      inv_txfm_add_16x8_dct_adst_0_8bpc_ssse3: 355.0
      inv_txfm_add_16x8_dct_adst_1_8bpc_c: 5261.0
      inv_txfm_add_16x8_dct_adst_1_8bpc_ssse3: 355.1
      inv_txfm_add_16x8_dct_adst_2_8bpc_c: 5212.5
      inv_txfm_add_16x8_dct_adst_2_8bpc_ssse3: 354.5
      inv_txfm_add_16x8_dct_dct_0_8bpc_c: 5252.9
      inv_txfm_add_16x8_dct_dct_0_8bpc_ssse3: 43.6
      inv_txfm_add_16x8_dct_dct_1_8bpc_c: 5260.0
      inv_txfm_add_16x8_dct_dct_1_8bpc_ssse3: 302.1
      inv_txfm_add_16x8_dct_dct_2_8bpc_c: 5250.4
      inv_txfm_add_16x8_dct_dct_2_8bpc_ssse3: 302.0
      inv_txfm_add_16x8_dct_flipadst_0_8bpc_c: 5216.6
      inv_txfm_add_16x8_dct_flipadst_0_8bpc_ssse3: 359.3
      inv_txfm_add_16x8_dct_flipadst_1_8bpc_c: 5229.9
      inv_txfm_add_16x8_dct_flipadst_1_8bpc_ssse3: 357.6
      inv_txfm_add_16x8_dct_flipadst_2_8bpc_c: 5261.4
      inv_txfm_add_16x8_dct_flipadst_2_8bpc_ssse3: 357.4
      inv_txfm_add_16x8_dct_identity_0_8bpc_c: 3999.2
      inv_txfm_add_16x8_dct_identity_0_8bpc_ssse3: 63.8
      inv_txfm_add_16x8_dct_identity_1_8bpc_c: 4018.1
      inv_txfm_add_16x8_dct_identity_1_8bpc_ssse3: 227.1
      inv_txfm_add_16x8_dct_identity_2_8bpc_c: 3998.7
      inv_txfm_add_16x8_dct_identity_2_8bpc_ssse3: 226.2
      inv_txfm_add_16x8_flipadst_adst_0_8bpc_c: 5124.9
      inv_txfm_add_16x8_flipadst_adst_0_8bpc_ssse3: 419.7
      inv_txfm_add_16x8_flipadst_adst_1_8bpc_c: 5100.7
      inv_txfm_add_16x8_flipadst_adst_1_8bpc_ssse3: 420.5
      inv_txfm_add_16x8_flipadst_adst_2_8bpc_c: 5087.1
      inv_txfm_add_16x8_flipadst_adst_2_8bpc_ssse3: 419.9
      inv_txfm_add_16x8_flipadst_dct_0_8bpc_c: 5183.2
      inv_txfm_add_16x8_flipadst_dct_0_8bpc_ssse3: 367.1
      inv_txfm_add_16x8_flipadst_dct_1_8bpc_c: 5193.7
      inv_txfm_add_16x8_flipadst_dct_1_8bpc_ssse3: 368.6
      inv_txfm_add_16x8_flipadst_dct_2_8bpc_c: 5186.8
      inv_txfm_add_16x8_flipadst_dct_2_8bpc_ssse3: 368.4
      inv_txfm_add_16x8_flipadst_flipadst_0_8bpc_c: 5091.3
      inv_txfm_add_16x8_flipadst_flipadst_0_8bpc_ssse3: 421.2
      inv_txfm_add_16x8_flipadst_flipadst_1_8bpc_c: 5118.5
      inv_txfm_add_16x8_flipadst_flipadst_1_8bpc_ssse3: 421.4
      inv_txfm_add_16x8_flipadst_flipadst_2_8bpc_c: 5119.0
      inv_txfm_add_16x8_flipadst_flipadst_2_8bpc_ssse3: 421.2
      inv_txfm_add_16x8_flipadst_identity_0_8bpc_c: 3909.3
      inv_txfm_add_16x8_flipadst_identity_0_8bpc_ssse3: 289.9
      inv_txfm_add_16x8_flipadst_identity_1_8bpc_c: 3920.7
      inv_txfm_add_16x8_flipadst_identity_1_8bpc_ssse3: 290.4
      inv_txfm_add_16x8_flipadst_identity_2_8bpc_c: 3936.7
      inv_txfm_add_16x8_flipadst_identity_2_8bpc_ssse3: 290.6
      inv_txfm_add_16x8_identity_adst_0_8bpc_c: 3869.3
      inv_txfm_add_16x8_identity_adst_0_8bpc_ssse3: 280.0
      inv_txfm_add_16x8_identity_adst_1_8bpc_c: 3832.2
      inv_txfm_add_16x8_identity_adst_1_8bpc_ssse3: 281.4
      inv_txfm_add_16x8_identity_adst_2_8bpc_c: 3820.8
      inv_txfm_add_16x8_identity_adst_2_8bpc_ssse3: 281.5
      inv_txfm_add_16x8_identity_dct_0_8bpc_c: 3878.6
      inv_txfm_add_16x8_identity_dct_0_8bpc_ssse3: 76.7
      inv_txfm_add_16x8_identity_dct_1_8bpc_c: 3883.3
      inv_txfm_add_16x8_identity_dct_1_8bpc_ssse3: 76.3
      inv_txfm_add_16x8_identity_dct_2_8bpc_c: 3900.6
      inv_txfm_add_16x8_identity_dct_2_8bpc_ssse3: 220.1
      inv_txfm_add_16x8_identity_flipadst_0_8bpc_c: 3840.9
      inv_txfm_add_16x8_identity_flipadst_0_8bpc_ssse3: 277.1
      inv_txfm_add_16x8_identity_flipadst_1_8bpc_c: 3860.6
      inv_txfm_add_16x8_identity_flipadst_1_8bpc_ssse3: 277.0
      inv_txfm_add_16x8_identity_flipadst_2_8bpc_c: 3849.4
      inv_txfm_add_16x8_identity_flipadst_2_8bpc_ssse3: 277.2
      inv_txfm_add_16x8_identity_identity_0_8bpc_c: 2610.9
      inv_txfm_add_16x8_identity_identity_0_8bpc_ssse3: 159.8
      inv_txfm_add_16x8_identity_identity_1_8bpc_c: 2597.1
      inv_txfm_add_16x8_identity_identity_1_8bpc_ssse3: 159.8
      inv_txfm_add_16x8_identity_identity_2_8bpc_c: 2607.9
      inv_txfm_add_16x8_identity_identity_2_8bpc_ssse3: 159.9
      a532e5ae