1. 01 Mar, 2019 3 commits
    • Liwei Wang's avatar
      Add SSSE3 implementation for the 16x16 blocks in itx · 1b30cf2a
      Liwei Wang authored
      Cycle times:
      inv_txfm_add_16x16_adst_adst_0_8bpc_c: 19643.8
      inv_txfm_add_16x16_adst_adst_0_8bpc_ssse3: 870.0
      inv_txfm_add_16x16_adst_adst_1_8bpc_c: 19611.7
      inv_txfm_add_16x16_adst_adst_1_8bpc_ssse3: 870.3
      inv_txfm_add_16x16_adst_adst_2_8bpc_c: 19554.2
      inv_txfm_add_16x16_adst_adst_2_8bpc_ssse3: 869.9
      inv_txfm_add_16x16_adst_dct_0_8bpc_c: 19499.2
      inv_txfm_add_16x16_adst_dct_0_8bpc_ssse3: 761.1
      inv_txfm_add_16x16_adst_dct_1_8bpc_c: 19819.1
      inv_txfm_add_16x16_adst_dct_1_8bpc_ssse3: 760.9
      inv_txfm_add_16x16_adst_dct_2_8bpc_c: 19684.5
      inv_txfm_add_16x16_adst_dct_2_8bpc_ssse3: 761.4
      inv_txfm_add_16x16_adst_flipadst_0_8bpc_c: 19309.3
      inv_txfm_add_16x16_adst_flipadst_0_8bpc_ssse3: 877.2
      inv_txfm_add_16x16_adst_flipadst_1_8bpc_c: 19374.3
      inv_txfm_add_16x16_adst_flipadst_1_8bpc_ssse3: 876.8
      inv_txfm_add_16x16_adst_flipadst_2_8bpc_c: 19548.6
      inv_txfm_add_16x16_adst_flipadst_2_8bpc_ssse3: 879.4
      inv_txfm_add_16x16_dct_adst_0_8bpc_c: 19715.3
      inv_txfm_add_16x16_dct_adst_0_8bpc_ssse3: 757.6
      inv_txfm_add_16x16_dct_adst_1_8bpc_c: 19586.6
      inv_txfm_add_16x16_dct_adst_1_8bpc_ssse3: 756.8
      inv_txfm_add_16x16_dct_adst_2_8bpc_c: 19447.3
      inv_txfm_add_16x16_dct_adst_2_8bpc_ssse3: 757.2
      inv_txfm_add_16x16_dct_dct_0_8bpc_c: 19188.0
      inv_txfm_add_16x16_dct_dct_0_8bpc_ssse3: 64.3
      inv_txfm_add_16x16_dct_dct_1_8bpc_c: 19230.1
      inv_txfm_add_16x16_dct_dct_1_8bpc_ssse3: 649.1
      inv_txfm_add_16x16_dct_dct_2_8bpc_c: 19276.7
      inv_txfm_add_16x16_dct_dct_2_8bpc_ssse3: 649.5
      inv_txfm_add_16x16_dct_flipadst_0_8bpc_c: 19967.8
      inv_txfm_add_16x16_dct_flipadst_0_8bpc_ssse3: 761.1
      inv_txfm_add_16x16_dct_flipadst_1_8bpc_c: 19665.7
      inv_txfm_add_16x16_dct_flipadst_1_8bpc_ssse3: 761.0
      inv_txfm_add_16x16_dct_flipadst_2_8bpc_c: 19766.2
      inv_txfm_add_16x16_dct_flipadst_2_8bpc_ssse3: 760.6
      inv_txfm_add_16x16_dct_identity_0_8bpc_c: 13874.5
      inv_txfm_add_16x16_dct_identity_0_8bpc_ssse3: 97.3
      inv_txfm_add_16x16_dct_identity_1_8bpc_c: 13931.8
      inv_txfm_add_16x16_dct_identity_1_8bpc_ssse3: 76.3
      inv_txfm_add_16x16_dct_identity_2_8bpc_c: 13801.5
      inv_txfm_add_16x16_dct_identity_2_8bpc_ssse3: 454.6
      inv_txfm_add_16x16_flipadst_adst_0_8bpc_c: 18900.6
      inv_txfm_add_16x16_flipadst_adst_0_8bpc_ssse3: 884.6
      inv_txfm_add_16x16_flipadst_adst_1_8bpc_c: 19180.2
      inv_txfm_add_16x16_flipadst_adst_1_8bpc_ssse3: 886.7
      inv_txfm_add_16x16_flipadst_adst_2_8bpc_c: 19320.8
      inv_txfm_add_16x16_flipadst_adst_2_8bpc_ssse3: 884.6
      inv_txfm_add_16x16_flipadst_dct_0_8bpc_c: 19399.7
      inv_txfm_add_16x16_flipadst_dct_0_8bpc_ssse3: 775.0
      inv_txfm_add_16x16_flipadst_dct_1_8bpc_c: 19345.0
      inv_txfm_add_16x16_flipadst_dct_1_8bpc_ssse3: 774.6
      inv_txfm_add_16x16_flipadst_dct_2_8bpc_c: 19426.2
      inv_txfm_add_16x16_flipadst_dct_2_8bpc_ssse3: 775.6
      inv_txfm_add_16x16_flipadst_flipadst_0_8bpc_c: 19457.6
      inv_txfm_add_16x16_flipadst_flipadst_0_8bpc_ssse3: 887.8
      inv_txfm_add_16x16_flipadst_flipadst_1_8bpc_c: 19413.8
      inv_txfm_add_16x16_flipadst_flipadst_1_8bpc_ssse3: 885.3
      inv_txfm_add_16x16_flipadst_flipadst_2_8bpc_c: 19425.6
      inv_txfm_add_16x16_flipadst_flipadst_2_8bpc_ssse3: 886.3
      inv_txfm_add_16x16_identity_dct_0_8bpc_c: 14150.7
      inv_txfm_add_16x16_identity_dct_0_8bpc_ssse3: 104.3
      inv_txfm_add_16x16_identity_dct_1_8bpc_c: 14041.5
      inv_txfm_add_16x16_identity_dct_1_8bpc_ssse3: 104.2
      inv_txfm_add_16x16_identity_dct_2_8bpc_c: 13917.7
      inv_txfm_add_16x16_identity_dct_2_8bpc_ssse3: 459.7
      inv_txfm_add_16x16_identity_identity_0_8bpc_c: 8761.7
      inv_txfm_add_16x16_identity_identity_0_8bpc_ssse3: 263.3
      inv_txfm_add_16x16_identity_identity_1_8bpc_c: 8669.5
      inv_txfm_add_16x16_identity_identity_1_8bpc_ssse3: 263.4
      inv_txfm_add_16x16_identity_identity_2_8bpc_c: 8282.1
      inv_txfm_add_16x16_identity_identity_2_8bpc_ssse3: 263.3
      1b30cf2a
    • Ronald S. Bultje's avatar
      255581d5
    • Matthias Dressel's avatar
      Update the copyright year to 2019 · f1cdb441
      Matthias Dressel authored
      f1cdb441
  2. 26 Feb, 2019 9 commits
    • Janne Grunau's avatar
      obu: ignore operating_parameter_info in new sequence check · 2abc436e
      Janne Grunau authored
      The operating_parameter_info is allowed to change in a single sequence.
      Reorder Dav1dSequenceHeader so the check for new sequence can still be
      done with memcmp and pffsetof.
      2abc436e
    • Victorien Le Couviour--Tuffet's avatar
      x86: add SSSE3 cdef filters implementation · 791ec219
      Victorien Le Couviour--Tuffet authored
      AVX2 adaption
      
      ---------------------
      x86_64:
      ------------------------------------------
      cdef_filter_4x4_8bpc_c: 1370.2
      cdef_filter_4x4_8bpc_ssse3: 142.3
      cdef_filter_4x4_8bpc_avx2: 106.7
      ------------------------------------------
      cdef_filter_4x8_8bpc_c: 2749.3
      cdef_filter_4x8_8bpc_ssse3: 257.2
      cdef_filter_4x8_8bpc_avx2: 178.8
      ------------------------------------------
      cdef_filter_8x8_8bpc_c: 5609.5
      cdef_filter_8x8_8bpc_ssse3: 438.1
      cdef_filter_8x8_8bpc_avx2: 250.6
      ------------------------------------------
      
      ---------------------
      x86_32:
      ------------------------------------------
      cdef_filter_4x4_8bpc_c: 1548.7
      cdef_filter_4x4_8bpc_ssse3: 179.8
      ------------------------------------------
      cdef_filter_4x8_8bpc_c: 3128.2
      cdef_filter_4x8_8bpc_ssse3: 328.1
      ------------------------------------------
      cdef_filter_8x8_8bpc_c: 6454.5
      cdef_filter_8x8_8bpc_ssse3: 584.4
      ------------------------------------------
      791ec219
    • Victorien Le Couviour--Tuffet's avatar
      x86: optimize AVX2 cdef filters · 80650d4c
      Victorien Le Couviour--Tuffet authored
      before: cdef_filter_4x4_8bpc_avx2: 110.4
       after: cdef_filter_4x4_8bpc_avx2: 106.0
      
      before: cdef_filter_4x8_8bpc_avx2: 188.3
       after: cdef_filter_4x8_8bpc_avx2: 182.2
      
      before: cdef_filter_8x8_8bpc_avx2: 276.7
       after: cdef_filter_8x8_8bpc_avx2: 252.5
      
      Credit to Gramner.
      80650d4c
    • Victorien Le Couviour--Tuffet's avatar
    • Victorien Le Couviour--Tuffet's avatar
      x86: add AVX2 cdef_filter_4x8 · 19b4c9c0
      Victorien Le Couviour--Tuffet authored
      used for YUV 422 chroma blocks
      
      cdef_filter_4x8_8bpc_c: 2711.6
      cdef_filter_4x8_8bpc_avx2: 189.1
      19b4c9c0
    • Victorien Le Couviour--Tuffet's avatar
    • Victorien Le Couviour--Tuffet's avatar
      x86: improve AVX2 cdef_filter macro consistency · 3db19426
      Victorien Le Couviour--Tuffet authored
      - consistently use %3 instead of hardcoded value for tmp stride
      - also correct a comment
      3db19426
    • Janne Grunau's avatar
      fix dav1d spelling · ada9231c
      Janne Grunau authored
      ada9231c
    • Liwei Wang's avatar
      Add SSSE3 implementation for the 8x16 and 16x8 blocks in itx · a532e5ae
      Liwei Wang authored
      Cycle times:
      inv_txfm_add_8x16_adst_adst_0_8bpc_c: 5063.0
      inv_txfm_add_8x16_adst_adst_0_8bpc_ssse3: 406.8
      inv_txfm_add_8x16_adst_adst_1_8bpc_c: 5051.2
      inv_txfm_add_8x16_adst_adst_1_8bpc_ssse3: 407.3
      inv_txfm_add_8x16_adst_adst_2_8bpc_c: 5065.4
      inv_txfm_add_8x16_adst_adst_2_8bpc_ssse3: 407.9
      inv_txfm_add_8x16_adst_dct_0_8bpc_c: 5201.1
      inv_txfm_add_8x16_adst_dct_0_8bpc_ssse3: 354.8
      inv_txfm_add_8x16_adst_dct_1_8bpc_c: 5214.8
      inv_txfm_add_8x16_adst_dct_1_8bpc_ssse3: 354.8
      inv_txfm_add_8x16_adst_dct_2_8bpc_c: 5225.0
      inv_txfm_add_8x16_adst_dct_2_8bpc_ssse3: 355.1
      inv_txfm_add_8x16_adst_flipadst_0_8bpc_c: 7135.9
      inv_txfm_add_8x16_adst_flipadst_0_8bpc_ssse3: 409.7
      inv_txfm_add_8x16_adst_flipadst_1_8bpc_c: 8354.4
      inv_txfm_add_8x16_adst_flipadst_1_8bpc_ssse3: 409.2
      inv_txfm_add_8x16_adst_flipadst_2_8bpc_c: 7198.7
      inv_txfm_add_8x16_adst_flipadst_2_8bpc_ssse3: 409.7
      inv_txfm_add_8x16_adst_identity_0_8bpc_c: 3936.5
      inv_txfm_add_8x16_adst_identity_0_8bpc_ssse3: 262.0
      inv_txfm_add_8x16_adst_identity_1_8bpc_c: 4617.8
      inv_txfm_add_8x16_adst_identity_1_8bpc_ssse3: 261.4
      inv_txfm_add_8x16_adst_identity_2_8bpc_c: 3895.1
      inv_txfm_add_8x16_adst_identity_2_8bpc_ssse3: 262.1
      inv_txfm_add_8x16_dct_adst_0_8bpc_c: 5203.9
      inv_txfm_add_8x16_dct_adst_0_8bpc_ssse3: 355.1
      inv_txfm_add_8x16_dct_adst_1_8bpc_c: 5200.8
      inv_txfm_add_8x16_dct_adst_1_8bpc_ssse3: 355.4
      inv_txfm_add_8x16_dct_adst_2_8bpc_c: 5208.2
      inv_txfm_add_8x16_dct_adst_2_8bpc_ssse3: 355.1
      inv_txfm_add_8x16_dct_dct_0_8bpc_c: 5270.8
      inv_txfm_add_8x16_dct_dct_0_8bpc_ssse3: 57.0
      inv_txfm_add_8x16_dct_dct_1_8bpc_c: 5280.9
      inv_txfm_add_8x16_dct_dct_1_8bpc_ssse3: 303.2
      inv_txfm_add_8x16_dct_dct_2_8bpc_c: 5275.9
      inv_txfm_add_8x16_dct_dct_2_8bpc_ssse3: 302.4
      inv_txfm_add_8x16_dct_flipadst_0_8bpc_c: 5374.4
      inv_txfm_add_8x16_dct_flipadst_0_8bpc_ssse3: 356.5
      inv_txfm_add_8x16_dct_flipadst_1_8bpc_c: 5449.9
      inv_txfm_add_8x16_dct_flipadst_1_8bpc_ssse3: 356.8
      inv_txfm_add_8x16_dct_flipadst_2_8bpc_c: 5446.9
      inv_txfm_add_8x16_dct_flipadst_2_8bpc_ssse3: 356.7
      inv_txfm_add_8x16_dct_identity_0_8bpc_c: 3883.4
      inv_txfm_add_8x16_dct_identity_0_8bpc_ssse3: 76.1
      inv_txfm_add_8x16_dct_identity_1_8bpc_c: 3892.3
      inv_txfm_add_8x16_dct_identity_1_8bpc_ssse3: 76.1
      inv_txfm_add_8x16_dct_identity_2_8bpc_c: 4027.1
      inv_txfm_add_8x16_dct_identity_2_8bpc_ssse3: 209.9
      inv_txfm_add_8x16_flipadst_adst_0_8bpc_c: 7387.5
      inv_txfm_add_8x16_flipadst_adst_0_8bpc_ssse3: 408.9
      inv_txfm_add_8x16_flipadst_adst_1_8bpc_c: 7298.8
      inv_txfm_add_8x16_flipadst_adst_1_8bpc_ssse3: 408.8
      inv_txfm_add_8x16_flipadst_adst_2_8bpc_c: 7397.2
      inv_txfm_add_8x16_flipadst_adst_2_8bpc_ssse3: 408.9
      inv_txfm_add_8x16_flipadst_dct_0_8bpc_c: 5250.4
      inv_txfm_add_8x16_flipadst_dct_0_8bpc_ssse3: 355.3
      inv_txfm_add_8x16_flipadst_dct_1_8bpc_c: 5263.9
      inv_txfm_add_8x16_flipadst_dct_1_8bpc_ssse3: 355.4
      inv_txfm_add_8x16_flipadst_dct_2_8bpc_c: 5259.0
      inv_txfm_add_8x16_flipadst_dct_2_8bpc_ssse3: 356.3
      inv_txfm_add_8x16_flipadst_flipadst_0_8bpc_c: 5448.4
      inv_txfm_add_8x16_flipadst_flipadst_0_8bpc_ssse3: 410.2
      inv_txfm_add_8x16_flipadst_flipadst_1_8bpc_c: 5402.6
      inv_txfm_add_8x16_flipadst_flipadst_1_8bpc_ssse3: 410.8
      inv_txfm_add_8x16_flipadst_flipadst_2_8bpc_c: 6479.7
      inv_txfm_add_8x16_flipadst_flipadst_2_8bpc_ssse3: 409.8
      inv_txfm_add_8x16_flipadst_identity_0_8bpc_c: 3828.9
      inv_txfm_add_8x16_flipadst_identity_0_8bpc_ssse3: 262.7
      inv_txfm_add_8x16_flipadst_identity_1_8bpc_c: 3884.5
      inv_txfm_add_8x16_flipadst_identity_1_8bpc_ssse3: 262.0
      inv_txfm_add_8x16_flipadst_identity_2_8bpc_c: 3809.2
      inv_txfm_add_8x16_flipadst_identity_2_8bpc_ssse3: 262.9
      inv_txfm_add_8x16_identity_adst_0_8bpc_c: 4294.5
      inv_txfm_add_8x16_identity_adst_0_8bpc_ssse3: 268.8
      inv_txfm_add_8x16_identity_adst_1_8bpc_c: 4955.4
      inv_txfm_add_8x16_identity_adst_1_8bpc_ssse3: 269.1
      inv_txfm_add_8x16_identity_adst_2_8bpc_c: 4166.4
      inv_txfm_add_8x16_identity_adst_2_8bpc_ssse3: 269.9
      inv_txfm_add_8x16_identity_dct_0_8bpc_c: 4012.3
      inv_txfm_add_8x16_identity_dct_0_8bpc_ssse3: 56.7
      inv_txfm_add_8x16_identity_dct_1_8bpc_c: 4767.1
      inv_txfm_add_8x16_identity_dct_1_8bpc_ssse3: 215.1
      inv_txfm_add_8x16_identity_dct_2_8bpc_c: 4012.6
      inv_txfm_add_8x16_identity_dct_2_8bpc_ssse3: 215.9
      inv_txfm_add_8x16_identity_flipadst_0_8bpc_c: 4452.6
      inv_txfm_add_8x16_identity_flipadst_0_8bpc_ssse3: 270.5
      inv_txfm_add_8x16_identity_flipadst_1_8bpc_c: 4885.8
      inv_txfm_add_8x16_identity_flipadst_1_8bpc_ssse3: 270.3
      inv_txfm_add_8x16_identity_flipadst_2_8bpc_c: 4186.1
      inv_txfm_add_8x16_identity_flipadst_2_8bpc_ssse3: 271.5
      inv_txfm_add_8x16_identity_identity_0_8bpc_c: 2623.0
      inv_txfm_add_8x16_identity_identity_0_8bpc_ssse3: 123.1
      inv_txfm_add_8x16_identity_identity_1_8bpc_c: 2617.7
      inv_txfm_add_8x16_identity_identity_1_8bpc_ssse3: 122.9
      inv_txfm_add_8x16_identity_identity_2_8bpc_c: 2617.2
      inv_txfm_add_8x16_identity_identity_2_8bpc_ssse3: 123.1
      inv_txfm_add_16x8_adst_adst_0_8bpc_c: 5102.3
      inv_txfm_add_16x8_adst_adst_0_8bpc_ssse3: 409.0
      inv_txfm_add_16x8_adst_adst_1_8bpc_c: 5063.2
      inv_txfm_add_16x8_adst_adst_1_8bpc_ssse3: 409.5
      inv_txfm_add_16x8_adst_adst_2_8bpc_c: 5029.1
      inv_txfm_add_16x8_adst_adst_2_8bpc_ssse3: 410.1
      inv_txfm_add_16x8_adst_dct_0_8bpc_c: 5848.8
      inv_txfm_add_16x8_adst_dct_0_8bpc_ssse3: 358.8
      inv_txfm_add_16x8_adst_dct_1_8bpc_c: 5612.8
      inv_txfm_add_16x8_adst_dct_1_8bpc_ssse3: 358.8
      inv_txfm_add_16x8_adst_dct_2_8bpc_c: 5143.2
      inv_txfm_add_16x8_adst_dct_2_8bpc_ssse3: 358.5
      inv_txfm_add_16x8_adst_flipadst_0_8bpc_c: 5072.4
      inv_txfm_add_16x8_adst_flipadst_0_8bpc_ssse3: 413.3
      inv_txfm_add_16x8_adst_flipadst_1_8bpc_c: 5082.2
      inv_txfm_add_16x8_adst_flipadst_1_8bpc_ssse3: 413.6
      inv_txfm_add_16x8_adst_flipadst_2_8bpc_c: 5108.0
      inv_txfm_add_16x8_adst_flipadst_2_8bpc_ssse3: 413.8
      inv_txfm_add_16x8_adst_identity_0_8bpc_c: 3897.2
      inv_txfm_add_16x8_adst_identity_0_8bpc_ssse3: 283.6
      inv_txfm_add_16x8_adst_identity_1_8bpc_c: 3947.2
      inv_txfm_add_16x8_adst_identity_1_8bpc_ssse3: 283.1
      inv_txfm_add_16x8_adst_identity_2_8bpc_c: 3881.7
      inv_txfm_add_16x8_adst_identity_2_8bpc_ssse3: 283.6
      inv_txfm_add_16x8_dct_adst_0_8bpc_c: 5200.7
      inv_txfm_add_16x8_dct_adst_0_8bpc_ssse3: 355.0
      inv_txfm_add_16x8_dct_adst_1_8bpc_c: 5261.0
      inv_txfm_add_16x8_dct_adst_1_8bpc_ssse3: 355.1
      inv_txfm_add_16x8_dct_adst_2_8bpc_c: 5212.5
      inv_txfm_add_16x8_dct_adst_2_8bpc_ssse3: 354.5
      inv_txfm_add_16x8_dct_dct_0_8bpc_c: 5252.9
      inv_txfm_add_16x8_dct_dct_0_8bpc_ssse3: 43.6
      inv_txfm_add_16x8_dct_dct_1_8bpc_c: 5260.0
      inv_txfm_add_16x8_dct_dct_1_8bpc_ssse3: 302.1
      inv_txfm_add_16x8_dct_dct_2_8bpc_c: 5250.4
      inv_txfm_add_16x8_dct_dct_2_8bpc_ssse3: 302.0
      inv_txfm_add_16x8_dct_flipadst_0_8bpc_c: 5216.6
      inv_txfm_add_16x8_dct_flipadst_0_8bpc_ssse3: 359.3
      inv_txfm_add_16x8_dct_flipadst_1_8bpc_c: 5229.9
      inv_txfm_add_16x8_dct_flipadst_1_8bpc_ssse3: 357.6
      inv_txfm_add_16x8_dct_flipadst_2_8bpc_c: 5261.4
      inv_txfm_add_16x8_dct_flipadst_2_8bpc_ssse3: 357.4
      inv_txfm_add_16x8_dct_identity_0_8bpc_c: 3999.2
      inv_txfm_add_16x8_dct_identity_0_8bpc_ssse3: 63.8
      inv_txfm_add_16x8_dct_identity_1_8bpc_c: 4018.1
      inv_txfm_add_16x8_dct_identity_1_8bpc_ssse3: 227.1
      inv_txfm_add_16x8_dct_identity_2_8bpc_c: 3998.7
      inv_txfm_add_16x8_dct_identity_2_8bpc_ssse3: 226.2
      inv_txfm_add_16x8_flipadst_adst_0_8bpc_c: 5124.9
      inv_txfm_add_16x8_flipadst_adst_0_8bpc_ssse3: 419.7
      inv_txfm_add_16x8_flipadst_adst_1_8bpc_c: 5100.7
      inv_txfm_add_16x8_flipadst_adst_1_8bpc_ssse3: 420.5
      inv_txfm_add_16x8_flipadst_adst_2_8bpc_c: 5087.1
      inv_txfm_add_16x8_flipadst_adst_2_8bpc_ssse3: 419.9
      inv_txfm_add_16x8_flipadst_dct_0_8bpc_c: 5183.2
      inv_txfm_add_16x8_flipadst_dct_0_8bpc_ssse3: 367.1
      inv_txfm_add_16x8_flipadst_dct_1_8bpc_c: 5193.7
      inv_txfm_add_16x8_flipadst_dct_1_8bpc_ssse3: 368.6
      inv_txfm_add_16x8_flipadst_dct_2_8bpc_c: 5186.8
      inv_txfm_add_16x8_flipadst_dct_2_8bpc_ssse3: 368.4
      inv_txfm_add_16x8_flipadst_flipadst_0_8bpc_c: 5091.3
      inv_txfm_add_16x8_flipadst_flipadst_0_8bpc_ssse3: 421.2
      inv_txfm_add_16x8_flipadst_flipadst_1_8bpc_c: 5118.5
      inv_txfm_add_16x8_flipadst_flipadst_1_8bpc_ssse3: 421.4
      inv_txfm_add_16x8_flipadst_flipadst_2_8bpc_c: 5119.0
      inv_txfm_add_16x8_flipadst_flipadst_2_8bpc_ssse3: 421.2
      inv_txfm_add_16x8_flipadst_identity_0_8bpc_c: 3909.3
      inv_txfm_add_16x8_flipadst_identity_0_8bpc_ssse3: 289.9
      inv_txfm_add_16x8_flipadst_identity_1_8bpc_c: 3920.7
      inv_txfm_add_16x8_flipadst_identity_1_8bpc_ssse3: 290.4
      inv_txfm_add_16x8_flipadst_identity_2_8bpc_c: 3936.7
      inv_txfm_add_16x8_flipadst_identity_2_8bpc_ssse3: 290.6
      inv_txfm_add_16x8_identity_adst_0_8bpc_c: 3869.3
      inv_txfm_add_16x8_identity_adst_0_8bpc_ssse3: 280.0
      inv_txfm_add_16x8_identity_adst_1_8bpc_c: 3832.2
      inv_txfm_add_16x8_identity_adst_1_8bpc_ssse3: 281.4
      inv_txfm_add_16x8_identity_adst_2_8bpc_c: 3820.8
      inv_txfm_add_16x8_identity_adst_2_8bpc_ssse3: 281.5
      inv_txfm_add_16x8_identity_dct_0_8bpc_c: 3878.6
      inv_txfm_add_16x8_identity_dct_0_8bpc_ssse3: 76.7
      inv_txfm_add_16x8_identity_dct_1_8bpc_c: 3883.3
      inv_txfm_add_16x8_identity_dct_1_8bpc_ssse3: 76.3
      inv_txfm_add_16x8_identity_dct_2_8bpc_c: 3900.6
      inv_txfm_add_16x8_identity_dct_2_8bpc_ssse3: 220.1
      inv_txfm_add_16x8_identity_flipadst_0_8bpc_c: 3840.9
      inv_txfm_add_16x8_identity_flipadst_0_8bpc_ssse3: 277.1
      inv_txfm_add_16x8_identity_flipadst_1_8bpc_c: 3860.6
      inv_txfm_add_16x8_identity_flipadst_1_8bpc_ssse3: 277.0
      inv_txfm_add_16x8_identity_flipadst_2_8bpc_c: 3849.4
      inv_txfm_add_16x8_identity_flipadst_2_8bpc_ssse3: 277.2
      inv_txfm_add_16x8_identity_identity_0_8bpc_c: 2610.9
      inv_txfm_add_16x8_identity_identity_0_8bpc_ssse3: 159.8
      inv_txfm_add_16x8_identity_identity_1_8bpc_c: 2597.1
      inv_txfm_add_16x8_identity_identity_1_8bpc_ssse3: 159.8
      inv_txfm_add_16x8_identity_identity_2_8bpc_c: 2607.9
      inv_txfm_add_16x8_identity_identity_2_8bpc_ssse3: 159.9
      a532e5ae
  3. 25 Feb, 2019 1 commit
  4. 20 Feb, 2019 4 commits
  5. 19 Feb, 2019 3 commits
    • James Almer's avatar
      picture: use the input picture metadata buffer references in dav1d_picture_alloc_copy() · 04199ada
      James Almer authored
      The references in the Dav1dContext may not necessarely apply to the picture being copied.
      04199ada
    • Henrik Gramner's avatar
      x86: Fix buffer overread in ipred_filter_avx2.w32 · dce4e788
      Henrik Gramner authored
      Eliminates segfault with clusterfuzz-testcase-minimized-dav1d_fuzzer-5697181166600192.
      
      Credit to OSS-Fuzz.
      dce4e788
    • Xuefeng Jiang's avatar
      Add SSSE3 implementation for ipred_cfl, ipred_cfl_top, ipred_cfl_left and ipred_cfl_128 · 9caabc7b
      Xuefeng Jiang authored
      cfl_pred_cfl_128_w4_8bpc_c: 291.3
      cfl_pred_cfl_128_w4_8bpc_ssse3: 34.2
      cfl_pred_cfl_128_w8_8bpc_c: 838.8
      cfl_pred_cfl_128_w8_8bpc_ssse3: 55.4
      cfl_pred_cfl_128_w16_8bpc_c: 1640.6
      cfl_pred_cfl_128_w16_8bpc_ssse3: 91.8
      cfl_pred_cfl_128_w32_8bpc_c: 4073.5
      cfl_pred_cfl_128_w32_8bpc_ssse3: 206.6
      cfl_pred_cfl_left_w4_8bpc_c: 321.6
      cfl_pred_cfl_left_w4_8bpc_ssse3: 40.0
      cfl_pred_cfl_left_w8_8bpc_c: 887.8
      cfl_pred_cfl_left_w8_8bpc_ssse3: 62.9
      cfl_pred_cfl_left_w16_8bpc_c: 1932.6
      cfl_pred_cfl_left_w16_8bpc_ssse3: 97.4
      cfl_pred_cfl_left_w32_8bpc_c: 4795.4
      cfl_pred_cfl_left_w32_8bpc_ssse3: 213.8
      cfl_pred_cfl_top_w4_8bpc_c: 359.7
      cfl_pred_cfl_top_w4_8bpc_ssse3: 38.2
      cfl_pred_cfl_top_w8_8bpc_c: 1007.1
      cfl_pred_cfl_top_w8_8bpc_ssse3: 58.5
      cfl_pred_cfl_top_w16_8bpc_c: 1873.4
      cfl_pred_cfl_top_w16_8bpc_ssse3: 97.9
      cfl_pred_cfl_top_w32_8bpc_c: 4523.7
      cfl_pred_cfl_top_w32_8bpc_ssse3: 216.9
      cfl_pred_cfl_w4_8bpc_c: 537.4
      cfl_pred_cfl_w4_8bpc_ssse3: 44.9
      cfl_pred_cfl_w8_8bpc_c: 1031.1
      cfl_pred_cfl_w8_8bpc_ssse3: 66.7
      cfl_pred_cfl_w16_8bpc_c: 1751.5
      cfl_pred_cfl_w16_8bpc_ssse3: 99.9
      cfl_pred_cfl_w32_8bpc_c: 4814.5
      cfl_pred_cfl_w32_8bpc_ssse3: 219.8
      9caabc7b
  6. 17 Feb, 2019 2 commits
  7. 16 Feb, 2019 2 commits
  8. 15 Feb, 2019 3 commits
  9. 14 Feb, 2019 5 commits
  10. 13 Feb, 2019 8 commits