Janne Grunau authored Jul 29, 2014 and Anton Mitrofanov committed Dec 16, 2014

35 times faster than C.

Janne Grunau authored Jul 29, 2014 and Anton Mitrofanov committed Dec 16, 2014

zigzag_scan_4x4_field_neon, zigzag_sub_4x4_field_neon,
zigzag_sub_4x4ac_field_neon, zigzag_sub_4x4_frame_neon,
igzag_sub_4x4ac_frame_neon more than 2 times faster

zigzag_scan_8x8_frame_neon, zigzag_scan_8x8_field_neon,
zigzag_sub_8x8_field_neon, zigzag_sub_8x8_frame_neon 4-5 times faster

zigzag_interleave_8x8_cavlc_neon 6 times faster

Janne Grunau authored Jul 25, 2014 and Anton Mitrofanov committed Dec 16, 2014

~20% faster than calling pixel_sa8d_16x16 and pixel_satd_16x16
separately.

Janne Grunau authored Aug 14, 2014 and Anton Mitrofanov committed Dec 16, 2014

25% faster than the previous version.

All CPUs with AVX2 supports FMA3 (but not the other way around).

Didn't affect output due to the incorrect values either not being used in the
code path or producing equal results compared to the correct values.

Also deduplicate hpel_ref arrays.

It would previously report FAILED if any of the earlier plane_copy tests failed.

40->27 cycles on Haswell.

Improves the accuracy of benchmarks, especially in short functions.

To quote the Intel 64 and IA-32 Architectures Software Developer's Manual:
"The RDTSC instruction is not a serializing instruction. It does not necessarily
wait until all previous instructions have been executed before reading the counter.
Similarly, subsequent instructions may begin execution before the read operation
is performed. If software requires RDTSC to be executed only after all previous
instructions have completed locally, it can either use RDTSCP (if the processor
supports that instruction) or execute the sequence LFENCE;RDTSC."

RDTSCP would accomplish the same task, but it's only available since Nehalem.

This change makes SSE2 a requirement to run checkasm.

Previously there was a limit of two cpuflags.

Reduce the number of vector registers used from 7 to 5.
Eliminate some moves in the AVX implementation.
Avoid bypass delays for transitioning between int and float domains.

Also drop the MMX version instead of doing a bunch of ifdeffery to support it after this change.

Deblock chroma/luma are based on libav's h264 aarch64 NEON deblocking
filter which was ported by me from the existing ARM NEON asm. No
additional persons to ask for a relicense.

Ported from the ARM NEON asm.

Ported from the ARM NEON asm.

Ported from the ARM NEON asm.

Ported from the ARM NEON asm.

Ported from the ARM NEON asm.

9-19% faster on a cortex-a9.

mc_weight_w4_*neon is also used for width 2 which does not guarantee
4-byte aligned destination. Fixes crashes caused by random memory
corruption.