1. 05 Sep, 2008 1 commit
  2. 30 Aug, 2008 2 commits
  3. 21 Aug, 2008 2 commits
  4. 16 Aug, 2008 1 commit
  5. 09 Aug, 2008 1 commit
  6. 30 Jul, 2008 1 commit
  7. 26 Jul, 2008 1 commit
  8. 24 Jul, 2008 1 commit
  9. 18 Jul, 2008 1 commit
  10. 12 Jul, 2008 1 commit
  11. 11 Jul, 2008 2 commits
  12. 10 Jul, 2008 2 commits
    • Fiona Glaser's avatar
      Fix and enable I_PCM macroblock support · 6b4ad5f5
      Fiona Glaser authored
      In RD mode, always consider PCM as a macroblock mode possibility
      Fix bitstream writing for PCM blocks in CAVLC and CABAC, and a few other minor changes to make PCM work.
      PCM macroblocks improve compression at very low QPs (1-5) and in lossless mode.
      6b4ad5f5
    • Fiona Glaser's avatar
      faster bs_write · ab90da74
      Fiona Glaser authored
      ab90da74
  13. 04 Jul, 2008 1 commit
    • Fiona Glaser's avatar
      Update file headers throughout x264 · bdbd4fe7
      Fiona Glaser authored
      Update "Authors" lists based on actual authorship; highest is most important
      Update copyright notices and remove old CVS tags from file headers
      Add file headers to GTK and other sections missing them
      Update FSF address
      Other header-related cosmetics
      bdbd4fe7
  14. 24 Jun, 2008 1 commit
  15. 18 Jun, 2008 1 commit
  16. 15 Jun, 2008 1 commit
  17. 08 Jun, 2008 1 commit
    • Loren Merritt's avatar
      many changes to which asm functions are enabled on which cpus. · c0c0e1f4
      Loren Merritt authored
      with Phenom, 3dnow is no longer equivalent to "sse2 is slow", so make a new flag for that.
      some sse2 functions are useful only on Core2 and Phenom, so make a "sse2 is fast" flag for that.
      some ssse3 instructions didn't become useful until Penryn, so yet another flag.
      disable sse2 completely on Pentium M and Core1, because it's uniformly slower than mmx.
      enable some sse2 functions on Athlon64 that always were faster and we just didn't notice.
      remove mc_luma_sse3, because the only cpu that has lddqu (namely Pentium 4D) doesn't have "sse2 is fast".
      don't print mmx1, sse1, nor 3dnow in the detected cpuflags, since we don't really have any such functions. likewise don't print sse3 unless it's used (Pentium 4D).
      c0c0e1f4
  18. 03 Jun, 2008 2 commits
  19. 02 Jun, 2008 2 commits
    • Gabriel Bouvigne's avatar
      2-pass VBV support and improved VBV handling · 56f2bc89
      Gabriel Bouvigne authored
      Dramatically improves 1-pass VBV ratecontrol (especially CBR) and provides support for VBV in 2-pass mode.  This consists of a series of functions that attempts to find overflows and underflows in the VBV from the first-pass statsfile and fix them before encoding.
      1-pass VBV code partially by Fiona Glaser.
      56f2bc89
    • Alexander Strange's avatar
      Fix noise reduction in threaded mode. · 344cb169
      Alexander Strange authored
      Previously enabling noise reduction with threads had no effect.
      Note that this is not an optimal solution; each thread still tracks noise reducation separately (unlike in single-threaded mode).
      344cb169
  20. 21 May, 2008 1 commit
  21. 20 May, 2008 1 commit
  22. 14 May, 2008 1 commit
  23. 27 Apr, 2008 2 commits
  24. 21 Apr, 2008 1 commit
  25. 30 Mar, 2008 1 commit
  26. 27 Jan, 2008 4 commits
  27. 18 Jan, 2008 1 commit
  28. 20 Nov, 2007 1 commit
  29. 15 Nov, 2007 1 commit
  30. 24 Sep, 2007 1 commit