Commit 05c16463 authored by Bernhard Rosenkränzer's avatar Bernhard Rosenkränzer Committed by Fiona Glaser

Fix build on ARM with binutils >= 2.23.51.0.6

GAS doesn't seem to like spaces in vld1 anymore, so remove those.
parent 23829dd2
...@@ -68,45 +68,45 @@ SAD4_ARMV6 8 ...@@ -68,45 +68,45 @@ SAD4_ARMV6 8
.macro SAD_START_4 align:vararg .macro SAD_START_4 align:vararg
vld1.32 {d1[]}, [r2 \align], r3 vld1.32 {d1[]}, [r2\align], r3
vld1.32 {d0[]}, [r0,:32], r1 vld1.32 {d0[]}, [r0,:32], r1
vabdl.u8 q8, d0, d1 vabdl.u8 q8, d0, d1
.endm .endm
.macro SAD_4 align:vararg .macro SAD_4 align:vararg
vld1.32 {d1[]}, [r2 \align], r3 vld1.32 {d1[]}, [r2\align], r3
vld1.32 {d0[]}, [r0,:32], r1 vld1.32 {d0[]}, [r0,:32], r1
vabal.u8 q8, d0, d1 vabal.u8 q8, d0, d1
.endm .endm
.macro SAD_START_8 align:vararg .macro SAD_START_8 align:vararg
vld1.64 {d1}, [r2 \align], r3 vld1.64 {d1}, [r2\align], r3
vld1.64 {d0}, [r0,:64], r1 vld1.64 {d0}, [r0,:64], r1
vabdl.u8 q8, d0, d1 vabdl.u8 q8, d0, d1
.endm .endm
.macro SAD_8 align:vararg .macro SAD_8 align:vararg
vld1.64 {d1}, [r2 \align], r3 vld1.64 {d1}, [r2\align], r3
vld1.64 {d0}, [r0,:64], r1 vld1.64 {d0}, [r0,:64], r1
vabal.u8 q8, d0, d1 vabal.u8 q8, d0, d1
.endm .endm
.macro SAD_START_16 align:vararg .macro SAD_START_16 align:vararg
vld1.64 {d2-d3}, [r2 \align], r3 vld1.64 {d2-d3}, [r2\align], r3
vld1.64 {d0-d1}, [r0,:128], r1 vld1.64 {d0-d1}, [r0,:128], r1
vabdl.u8 q8, d0, d2 vabdl.u8 q8, d0, d2
vld1.64 {d6-d7}, [r2 \align], r3 vld1.64 {d6-d7}, [r2\align], r3
vabdl.u8 q9, d1, d3 vabdl.u8 q9, d1, d3
vld1.64 {d4-d5}, [r0,:128], r1 vld1.64 {d4-d5}, [r0,:128], r1
.endm .endm
.macro SAD_16 align:vararg .macro SAD_16 align:vararg
vabal.u8 q8, d4, d6 vabal.u8 q8, d4, d6
vld1.64 {d2-d3}, [r2 \align], r3 vld1.64 {d2-d3}, [r2\align], r3
vabal.u8 q9, d5, d7 vabal.u8 q9, d5, d7
vld1.64 {d0-d1}, [r0,:128], r1 vld1.64 {d0-d1}, [r0,:128], r1
vabal.u8 q8, d0, d2 vabal.u8 q8, d0, d2
vld1.64 {d6-d7}, [r2 \align], r3 vld1.64 {d6-d7}, [r2\align], r3
vabal.u8 q9, d1, d3 vabal.u8 q9, d1, d3
vld1.64 {d4-d5}, [r0,:128], r1 vld1.64 {d4-d5}, [r0,:128], r1
.endm .endm
......
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