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Updated date
riscv64/itx: Special case 16x16 8bpc dct_dct eob=0
!1675
· created
Jun 05, 2024
by
Bogdan Gligorijević
1.5.0
RISC-V
performance
Closed
25
updated
Oct 11, 2024
riscv64/mc: Add 8bpc RVV blend{,_h/v} functions
!1664
· created
May 05, 2024
by
Nathan E. Egge
1.5.0
RISC-V
performance
Closed
7
updated
Oct 11, 2024
riscv64/mc: Add bidir functions
!1659
· created
Apr 29, 2024
by
Niklas Haas
1.5.0
RISC-V
performance
Closed
29
updated
Oct 11, 2024
Port rav1e HBD AVX2 blend/blend_h/blend_v to dav1d
!1112
· created
Dec 28, 2020
by
Nathan E. Egge
performance
Closed
1
updated
May 11, 2021
Port rav1e HBD AVX2 avg/w_avg/mask to dav1d
!1111
· created
Dec 27, 2020
by
Nathan E. Egge
performance
Closed
1
updated
May 11, 2021
Port rav1e HBD AVX2 put/prep to dav1d
!1110
· created
Dec 27, 2020
by
Nathan E. Egge
performance
Closed
18
updated
May 11, 2021
WIP: Perform cdef on ~64x64 chunks.
!657
· created
Mar 28, 2019
by
Kyle Siefring
performance
Closed
15
updated
Apr 07, 2020
EC improvements and optimizations
!423
· created
Nov 23, 2018
by
Nathan E. Egge
performance
Closed
28
updated
Apr 15, 2019
Add SSSE3 prep_8tap
!604
· created
Feb 19, 2019
by
François Cartegnie
performance
Closed
8
updated
Mar 01, 2019
WIP: Extract damping out of CDEF constrain
!603
· created
Feb 19, 2019
by
Luc Trudeau
performance
Closed
3
updated
Feb 20, 2019
Add SSSE3 implementation for dav1d_avg_ssse3
!485
· created
Dec 10, 2018
by
licao
performance
Closed
1
updated
Dec 10, 2018
x86: Add chroma-from-luma AC 4:2:0 AVX2 asm
!441
· created
Nov 28, 2018
by
David Michael Barr
performance
Closed
25
updated
Dec 03, 2018