Commit 82eda83a authored by Committed by Henrik Gramner
Avoid excessive L2 collisions with certain frame widths
Memory addresses with certain power-of-two offsets will map to the same set of cache lines. Using such offsets as strides will cause excessive cache evictions resulting in more cache misses. Avoid this by adding a small padding when the stride is a multiple of 1024 (somewhat arbitrarily chosen as the specific number depends on the hardware implementation) when allocating picture buffers.
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